India's chip mission grows to $13.5 billion as plants start output
At SEMICON India on 17 September, India said three of its 12 approved chip projects are in commercial production and set a larger second phase.
Indian Prime Minister Narendra Modi opened SEMICON India 2026 in New Delhi on 17 September and said India's chip programme has moved from policy to commercial production, Business Today and The Tribune reported. The second phase of the India Semiconductor Mission has an outlay of 13.5 billion US dollars, up from 8 billion in the first. So far, every plant in production assembles and tests chips rather than making wafers.
- 12chip projects approved in the first phase
- 5plants in production after the event, all back-end
- 600+exhibitors at SEMICON India 2026
- 70,000chip design engineers trained in four years, per EE Times
- $8 bnoutlay of the mission's first phase
What happened
SEMICON India 2026 ran from 17 to 19 September at the Yashobhoomi convention centre in New Delhi. It was the fifth edition, organised by the India Semiconductor Mission, India's electronics ministry and SEMI, the global chip industry association. Business Today counted more than 600 exhibitors, about 300 of them international. The Tribune reported representatives from 52 countries, six country pavilions, 12 state booths, a startup pavilion, a student hackathon and a workforce development pavilion.
Modi said each SEMICON India since 2022 has marked a step: first policy, then projects and foundation stones, then pilot lines and test chips, and now commercial production. He said chips made in Indian plants are now reaching customers in India and abroad. According to government data cited by Business Today, 12 chip projects have been approved and three were in commercial production before the event. The Tribune reported that production started at two more plants during the event.
EE Times, writing on 23 September, named the two new lines. CDIL Semiconductor in Mohali, Punjab, makes discrete devices, and Suchi Semicon in Surat, Gujarat, does packaging. EE Times reported that all five producing plants are back-end units for assembly, test, marking and packaging, and none is a wafer fab. Micron's chief executive said commercial memory production is under way at its plant in Sanand, Gujarat. India's first commercial wafer fab, built by Tata Electronics in Dholera, Gujarat, is still under construction.
EE Times also reported comments from India's electronics minister, Ashwini Vaishnaw. He said the assembly and test units are shipping to Japan, and that Indian-made parts are going into products exported to the United States and to European countries such as Switzerland and Germany. Tata announced a deal to prepare the Dholera fab to make MOSFET transistors for the chipmaker Nexperia, though no volumes or dates were disclosed. Vaishnaw said one fab due to start production in 2028 has already booked a large share of its capacity.
The engineering behind it
Making a chip has two broad halves. The front end, called fabrication, takes place in a wafer fab. Patterns of transistors and wires are printed onto thin silicon wafers through hundreds of steps of deposition, lithography and etching, in extremely clean rooms. The back end takes the finished wafer, tests each chip on it, cuts it into individual dies, puts each die in a protective package with connecting pins, and tests it again. This is general industry knowledge, and it explains why the two halves need very different investment.
A modern wafer fab costs many billions of dollars and needs years to build, a steady supply of special chemicals and gases, very stable electricity and large amounts of pure water. Assembly and test plants cost much less and can start faster. That is why many countries start with the back end and add fabs later. Advanced packaging, which joins several dies inside one package, has also become more important as chips are split into smaller chiplets.
The second phase of the mission covers six areas: chip design, equipment and materials, fabrication, advanced packaging, research and talent. EE Times reported supporting announcements at the event. Lam Research, an equipment maker, plans about 10,000 crore rupees for its first component plant in India. Applied Materials announced a 5 billion dollar plan over ten years. Tata signed agreements with chemical and gas suppliers for Dholera. EE Times pointed out that many of these figures are commitments, not money already spent.
What it means in Nepal
The sources say nothing about Nepal, so this section is about the kind of work the industry needs. EE Times reported that India has trained about 70,000 chip design engineers in four years, against an original target of 85,000 over ten years. It also reported a target of 200 chip design startups, with 105 startups given access to design software in the first phase. Those numbers show that chip design is a large activity in its own right, separate from fabrication.
Chip design is mostly work at a computer. Engineers describe circuits in hardware description languages, simulate them, check that they behave correctly, and prepare the layout for a fab that may be in another country. Test and packaging plants need different engineers: people who understand electronic devices, measurement, signal quality, heat and reliability. Both kinds of work start from the same base of digital logic, electronic devices and circuits.
For a student, the useful conclusion is about skills, not about any one country's plans. A neighbouring country is spending billions of dollars on this industry, and its own reporting shows that design and testing are where most engineers are needed early. Students who build solid foundations in digital design, analogue circuits and embedded systems will understand the work, wherever they later choose to do it.
What to study if this interests you
Electronic Device and Circuits, ENEX 151, in the second semester of BEI and BCT, explains diodes and transistors, the devices a fab prints by the billion. Digital Logic, ENEX 152, in the same semester, teaches gates, flip-flops and the design of logic circuits, the starting point for chip design. It has a full guide on this site.
Embedded Systems, ENEX 302, in the fifth semester of BEI, shows how chips are used inside products and introduces programmable logic. Instrumentation, ENEX 252, in the fourth semester, covers measurement, sensors and test equipment, the daily tools of a chip test engineer. Students who enjoy these courses can look for VLSI or digital design topics among the electives and in their final-year project.
Words in this story
- Wafer fab
- A factory that prints transistors and wiring onto silicon wafers, the first and most expensive stage of chipmaking.
- ATMP
- Assembly, test, marking and packaging, the back-end steps that turn finished wafers into packaged, tested chips.
- VLSI
- Very large scale integration, the design of chips that hold millions or billions of transistors.
- Discrete device
- A single electronic component, such as one transistor or diode, packaged on its own rather than inside an integrated circuit.
Where this comes from
- Business Today, 17 Sep 2026
- The Tribune, 17 Sep 2026
- EE Times, 23 Sep 2026
Written in our own words; no sentence is copied from these reports. Researched with AI assistance on 11 October 2026; no member of faculty has reviewed it yet. If you spot a mistake, call 01-5091616 and we will correct it and say so.




